From 25c5dd2c9024288df0509ca59c6c1068c6e62566 Mon Sep 17 00:00:00 2001
From: Yi Kong <Yi.Kong@arm.com>
Date: Wed, 23 Jul 2014 09:25:02 +0000
Subject: [PATCH] ARM: Add doc for ACLE memory barrier intrinsics

Add documentations for ACLE memory barrier intrinsics, describing their motion
barrier characteristics.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@213733 91177308-0d34-0410-b5e6-96231b3b80d8
---
 docs/LanguageExtensions.rst | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/docs/LanguageExtensions.rst b/docs/LanguageExtensions.rst
index 4c600868e9e..50e1ccebe87 100644
--- a/docs/LanguageExtensions.rst
+++ b/docs/LanguageExtensions.rst
@@ -1634,6 +1634,19 @@ Target-Specific Extensions
 
 Clang supports some language features conditionally on some targets.
 
+ARM/AArch64 Language Extensions
+-------------------------------
+
+Memory Barrier Intrinsics
+^^^^^^^^^^^^^^^^^^^^^^^^^
+Clang implements the ``__dmb``, ``__dsb`` and ``__isb`` intrinsics as defined
+in the `ARM C Language Extensions Release 2.0
+<http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053c/IHI0053C_acle_2_0.pdf>`_.
+Note that these intrinsics are implemented as motion barriers that block
+reordering of memory accesses and side effect instructions. Other instructions
+like simple arithmatic may be reordered around the intrinsic. If you expect to
+have no reordering at all, use inline assembly instead.
+
 X86/X86-64 Language Extensions
 ------------------------------
 
-- 
GitLab