From 6fa49f4d2e703f85ebb3b0f9dc2c92900eccee36 Mon Sep 17 00:00:00 2001
From: Michael Zuckerman <Michael.zuckerman@intel.com>
Date: Fri, 29 Apr 2016 08:52:02 +0000
Subject: [PATCH] [Clang][AVX512][Builtin] Adding intrinsics for compress
instruction set
Differential Revision: http://reviews.llvm.org/D19599
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@268013 91177308-0d34-0410-b5e6-96231b3b80d8
---
include/clang/Basic/BuiltinsX86.def | 4 ++
lib/Headers/avx512fintrin.h | 68 +++++++++++++++++++++++++++++
test/CodeGen/avx512f-builtins.c | 47 ++++++++++++++++++++
3 files changed, 119 insertions(+)
diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def
index 963a8c576ff..452f42d1fc9 100644
--- a/include/clang/Basic/BuiltinsX86.def
+++ b/include/clang/Basic/BuiltinsX86.def
@@ -2218,6 +2218,10 @@ TARGET_BUILTIN(__builtin_ia32_dbpsadbw128_mask, "V8sV16cV16cIiV8sUc","","avx512b
TARGET_BUILTIN(__builtin_ia32_dbpsadbw256_mask, "V16sV32cV32cIiV16sUs","","avx512bw,avx512vl")
TARGET_BUILTIN(__builtin_ia32_dbpsadbw512_mask, "V32sV64cV64cIiV32sUi","","avx512bw")
TARGET_BUILTIN(__builtin_ia32_psadbw512, "V8LLiV64cV64c","","avx512bw")
+TARGET_BUILTIN(__builtin_ia32_compressdf512_mask, "V8dV8dV8dUc","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_compressdi512_mask, "V8LLiV8LLiV8LLiUc","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_compresssf512_mask, "V16fV16fV16fUs","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_compresssi512_mask, "V16iV16iV16iUs","","avx512f")
#undef BUILTIN
diff --git a/lib/Headers/avx512fintrin.h b/lib/Headers/avx512fintrin.h
index 844025836a4..5b9a45b4bd4 100644
--- a/lib/Headers/avx512fintrin.h
+++ b/lib/Headers/avx512fintrin.h
@@ -7561,6 +7561,74 @@ _mm512_stream_ps (float *__P, __m512 __A)
__builtin_ia32_movntps512 (__P, (__v16sf) __A);
}
+static __inline__ __m512d __DEFAULT_FN_ATTRS
+_mm512_mask_compress_pd (__m512d __W, __mmask8 __U, __m512d __A)
+{
+ return (__m512d) __builtin_ia32_compressdf512_mask ((__v8df) __A,
+ (__v8df) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m512d __DEFAULT_FN_ATTRS
+_mm512_maskz_compress_pd (__mmask8 __U, __m512d __A)
+{
+ return (__m512d) __builtin_ia32_compressdf512_mask ((__v8df) __A,
+ (__v8df)
+ _mm512_setzero_pd (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mask_compress_epi64 (__m512i __W, __mmask8 __U, __m512i __A)
+{
+ return (__m512i) __builtin_ia32_compressdi512_mask ((__v8di) __A,
+ (__v8di) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_maskz_compress_epi64 (__mmask8 __U, __m512i __A)
+{
+ return (__m512i) __builtin_ia32_compressdi512_mask ((__v8di) __A,
+ (__v8di)
+ _mm512_setzero_si512 (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m512 __DEFAULT_FN_ATTRS
+_mm512_mask_compress_ps (__m512 __W, __mmask16 __U, __m512 __A)
+{
+ return (__m512) __builtin_ia32_compresssf512_mask ((__v16sf) __A,
+ (__v16sf) __W,
+ (__mmask16) __U);
+}
+
+static __inline__ __m512 __DEFAULT_FN_ATTRS
+_mm512_maskz_compress_ps (__mmask16 __U, __m512 __A)
+{
+ return (__m512) __builtin_ia32_compresssf512_mask ((__v16sf) __A,
+ (__v16sf)
+ _mm512_setzero_ps (),
+ (__mmask16) __U);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mask_compress_epi32 (__m512i __W, __mmask16 __U, __m512i __A)
+{
+ return (__m512i) __builtin_ia32_compresssi512_mask ((__v16si) __A,
+ (__v16si) __W,
+ (__mmask16) __U);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_maskz_compress_epi32 (__mmask16 __U, __m512i __A)
+{
+ return (__m512i) __builtin_ia32_compresssi512_mask ((__v16si) __A,
+ (__v16si)
+ _mm512_setzero_si512 (),
+ (__mmask16) __U);
+}
+
#undef __DEFAULT_FN_ATTRS
#endif // __AVX512FINTRIN_H
diff --git a/test/CodeGen/avx512f-builtins.c b/test/CodeGen/avx512f-builtins.c
index 1f048d36b15..c73aa95b6d2 100644
--- a/test/CodeGen/avx512f-builtins.c
+++ b/test/CodeGen/avx512f-builtins.c
@@ -5238,3 +5238,50 @@ void test_mm512_stream_ps(float *__P, __m512 __A) {
_mm512_stream_ps(__P, __A);
}
+__m512d test_mm512_mask_compress_pd(__m512d __W, __mmask8 __U, __m512d __A) {
+ // CHECK-LABEL: @test_mm512_mask_compress_pd
+ // CHECK: @llvm.x86.avx512.mask.compress.pd.512
+ return _mm512_mask_compress_pd(__W, __U, __A);
+}
+
+__m512d test_mm512_maskz_compress_pd(__mmask8 __U, __m512d __A) {
+ // CHECK-LABEL: @test_mm512_maskz_compress_pd
+ // CHECK: @llvm.x86.avx512.mask.compress.pd.512
+ return _mm512_maskz_compress_pd(__U, __A);
+}
+
+__m512i test_mm512_mask_compress_epi64(__m512i __W, __mmask8 __U, __m512i __A) {
+ // CHECK-LABEL: @test_mm512_mask_compress_epi64
+ // CHECK: @llvm.x86.avx512.mask.compress.q.512
+ return _mm512_mask_compress_epi64(__W, __U, __A);
+}
+
+__m512i test_mm512_maskz_compress_epi64(__mmask8 __U, __m512i __A) {
+ // CHECK-LABEL: @test_mm512_maskz_compress_epi64
+ // CHECK: @llvm.x86.avx512.mask.compress.q.512
+ return _mm512_maskz_compress_epi64(__U, __A);
+}
+
+__m512 test_mm512_mask_compress_ps(__m512 __W, __mmask16 __U, __m512 __A) {
+ // CHECK-LABEL: @test_mm512_mask_compress_ps
+ // CHECK: @llvm.x86.avx512.mask.compress.ps.512
+ return _mm512_mask_compress_ps(__W, __U, __A);
+}
+
+__m512 test_mm512_maskz_compress_ps(__mmask16 __U, __m512 __A) {
+ // CHECK-LABEL: @test_mm512_maskz_compress_ps
+ // CHECK: @llvm.x86.avx512.mask.compress.ps.512
+ return _mm512_maskz_compress_ps(__U, __A);
+}
+
+__m512i test_mm512_mask_compress_epi32(__m512i __W, __mmask16 __U, __m512i __A) {
+ // CHECK-LABEL: @test_mm512_mask_compress_epi32
+ // CHECK: @llvm.x86.avx512.mask.compress.d.512
+ return _mm512_mask_compress_epi32(__W, __U, __A);
+}
+
+__m512i test_mm512_maskz_compress_epi32(__mmask16 __U, __m512i __A) {
+ // CHECK-LABEL: @test_mm512_maskz_compress_epi32
+ // CHECK: @llvm.x86.avx512.mask.compress.d.512
+ return _mm512_maskz_compress_epi32(__U, __A);
+}
--
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