diff --git a/include/clang/Basic/arm_neon.td b/include/clang/Basic/arm_neon.td
index 8349ba0cdd9ac65fe3ea78cb2c95d9fcdafeb4a9..e7f95a21c1a812d9ab2267bb6740daac55eaafc8 100644
--- a/include/clang/Basic/arm_neon.td
+++ b/include/clang/Basic/arm_neon.td
@@ -669,9 +669,9 @@ def USQADD : SInst<"vsqadd", "ddd", "UcUsUiUlQUcQUsQUiQUl">;
////////////////////////////////////////////////////////////////////////////////
// Reciprocal/Sqrt
-// With additional Qd type.
-def FRECPS : IInst<"vrecps", "ddd", "fQfQd">;
-def FRSQRTS : IInst<"vrsqrts", "ddd", "fQfQd">;
+// With additional d, Qd type.
+def FRECPS : IInst<"vrecps", "ddd", "fdQfQd">;
+def FRSQRTS : IInst<"vrsqrts", "ddd", "fdQfQd">;
////////////////////////////////////////////////////////////////////////////////
// bitwise reverse
@@ -695,39 +695,39 @@ def VCVT_HIGH_F16 : SOpInst<"vcvt_high_f16", "qhj", "f", OP_VCVT_NA_HI>;
def VCVT_HIGH_F32_F16 : SOpInst<"vcvt_high_f32", "wk", "h", OP_VCVT_EX_HI>;
def VCVT_F32_F64 : SInst<"vcvt_f32_f64", "fj", "d">;
def VCVT_HIGH_F32_F64 : SOpInst<"vcvt_high_f32", "qfj", "d", OP_VCVT_NA_HI>;
-def VCVT_F64_F32 : SInst<"vcvt_f64", "wd", "f">;
-def VCVT_F64 : SInst<"vcvt_f64", "Fd", "QlQUl">;
+def VCVT_F64_F32 : SInst<"vcvt_f64_f32", "wd", "f">;
+def VCVT_F64 : SInst<"vcvt_f64", "Fd", "lUlQlQUl">;
def VCVT_HIGH_F64_F32 : SOpInst<"vcvt_high_f64", "wj", "f", OP_VCVT_EX_HI>;
def VCVTX_F32_F64 : SInst<"vcvtx_f32", "fj", "d">;
def VCVTX_HIGH_F32_F64 : SOpInst<"vcvtx_high_f32", "qfj", "d", OP_VCVTX_HI>;
-def FRINTN : SInst<"vrndn", "dd", "fQfQd">;
-def FRINTA : SInst<"vrnda", "dd", "fQfQd">;
-def FRINTP : SInst<"vrndp", "dd", "fQfQd">;
-def FRINTM : SInst<"vrndm", "dd", "fQfQd">;
-def FRINTX : SInst<"vrndx", "dd", "fQfQd">;
-def FRINTZ : SInst<"vrnd", "dd", "fQfQd">;
-def FRINTI : SInst<"vrndi", "dd", "fQfQd">;
-def VCVT_S64 : SInst<"vcvt_s64", "xd", "Qd">;
-def VCVT_U64 : SInst<"vcvt_u64", "ud", "Qd">;
+def FRINTN : SInst<"vrndn", "dd", "fdQfQd">;
+def FRINTA : SInst<"vrnda", "dd", "fdQfQd">;
+def FRINTP : SInst<"vrndp", "dd", "fdQfQd">;
+def FRINTM : SInst<"vrndm", "dd", "fdQfQd">;
+def FRINTX : SInst<"vrndx", "dd", "fdQfQd">;
+def FRINTZ : SInst<"vrnd", "dd", "fdQfQd">;
+def FRINTI : SInst<"vrndi", "dd", "fdQfQd">;
+def VCVT_S64 : SInst<"vcvt_s64", "xd", "dQd">;
+def VCVT_U64 : SInst<"vcvt_u64", "ud", "dQd">;
def FCVTNS_S32 : SInst<"vcvtn_s32", "xd", "fQf">;
-def FCVTNS_S64 : SInst<"vcvtn_s64", "xd", "Qd">;
+def FCVTNS_S64 : SInst<"vcvtn_s64", "xd", "dQd">;
def FCVTNU_S32 : SInst<"vcvtn_u32", "ud", "fQf">;
-def FCVTNU_S64 : SInst<"vcvtn_u64", "ud", "Qd">;
+def FCVTNU_S64 : SInst<"vcvtn_u64", "ud", "dQd">;
def FCVTPS_S32 : SInst<"vcvtp_s32", "xd", "fQf">;
-def FCVTPS_S64 : SInst<"vcvtp_s64", "xd", "Qd">;
+def FCVTPS_S64 : SInst<"vcvtp_s64", "xd", "dQd">;
def FCVTPU_S32 : SInst<"vcvtp_u32", "ud", "fQf">;
-def FCVTPU_S64 : SInst<"vcvtp_u64", "ud", "Qd">;
+def FCVTPU_S64 : SInst<"vcvtp_u64", "ud", "dQd">;
def FCVTMS_S32 : SInst<"vcvtm_s32", "xd", "fQf">;
-def FCVTMS_S64 : SInst<"vcvtm_s64", "xd", "Qd">;
+def FCVTMS_S64 : SInst<"vcvtm_s64", "xd", "dQd">;
def FCVTMU_S32 : SInst<"vcvtm_u32", "ud", "fQf">;
-def FCVTMU_S64 : SInst<"vcvtm_u64", "ud", "Qd">;
+def FCVTMU_S64 : SInst<"vcvtm_u64", "ud", "dQd">;
def FCVTAS_S32 : SInst<"vcvta_s32", "xd", "fQf">;
-def FCVTAS_S64 : SInst<"vcvta_s64", "xd", "Qd">;
+def FCVTAS_S64 : SInst<"vcvta_s64", "xd", "dQd">;
def FCVTAU_S32 : SInst<"vcvta_u32", "ud", "fQf">;
-def FCVTAU_S64 : SInst<"vcvta_u64", "ud", "Qd">;
-def FRECPE : SInst<"vrecpe", "dd", "fUiQfQUiQd">;
-def FRSQRTE : SInst<"vrsqrte", "dd", "fUiQfQUiQd">;
-def FSQRT : SInst<"vsqrt", "dd", "fQfQd">;
+def FCVTAU_S64 : SInst<"vcvta_u64", "ud", "dQd">;
+def FRECPE : SInst<"vrecpe", "dd", "fdUiQfQUiQd">;
+def FRSQRTE : SInst<"vrsqrte", "dd", "fdUiQfQUiQd">;
+def FSQRT : SInst<"vsqrt", "dd", "fdQfQd">;
////////////////////////////////////////////////////////////////////////////////
// Comparison
@@ -742,7 +742,7 @@ def FCALT : IInst<"vcalt", "udd", "fQfQd">;
def CMTST : WInst<"vtst", "udd",
"csiUcUsUiPcPsQcQsQiQUcQUsQUiQPcQPslUlQlQUlPlQPl">;
def CFMEQ : SOpInst<"vceq", "udd",
- "csifUcUsUiPcQcQsQiQlQfQUcQUsQUiQUlQPcQd", OP_EQ>;
+ "csifUcUsUiPcQcQsQiQlQfQUcQUsQUiQUlQPcQd", OP_EQ>;
def CFMGE : SOpInst<"vcge", "udd", "csifUcUsUiQcQsQiQlQfQUcQUsQUiQUlQd", OP_GE>;
def CFMLE : SOpInst<"vcle", "udd", "csifUcUsUiQcQsQiQlQfQUcQUsQUiQUlQd", OP_LE>;
def CFMGT : SOpInst<"vcgt", "udd", "csifUcUsUiQcQsQiQlQfQUcQUsQUiQUlQd", OP_GT>;
@@ -816,9 +816,9 @@ def QRSHRN_HIGH_N : SOpInst<"vqrshrn_high_n", "hmdi",
def VMOVL_HIGH : SOpInst<"vmovl_high", "nd", "HcHsHiHUcHUsHUi", OP_MOVL_HI>;
let isVCVT_N = 1 in {
-def CVTF_N_F64 : SInst<"vcvt_n_f64", "Fdi", "QlQUl">;
-def FCVTZS_N_S64 : SInst<"vcvt_n_s64", "xdi", "Qd">;
-def FCVTZS_N_U64 : SInst<"vcvt_n_u64", "udi", "Qd">;
+def CVTF_N_F64 : SInst<"vcvt_n_f64", "Fdi", "lUlQlQUl">;
+def FCVTZS_N_S64 : SInst<"vcvt_n_s64", "xdi", "dQd">;
+def FCVTZS_N_U64 : SInst<"vcvt_n_u64", "udi", "dQd">;
}
////////////////////////////////////////////////////////////////////////////////
diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp
index d15cd771dd1fc2b45fc0576959a621c073f2d501..97252cbfdbe3778ec7dcd1b873052d033f96df33 100644
--- a/lib/CodeGen/CGBuiltin.cpp
+++ b/lib/CodeGen/CGBuiltin.cpp
@@ -2952,6 +2952,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
// Determine the type of this overloaded NEON intrinsic.
NeonTypeFlags Type(Result.getZExtValue());
bool usgn = Type.isUnsigned();
+ bool quad = Type.isQuad();
llvm::VectorType *VTy = GetNeonType(this, Type);
llvm::Type *Ty = VTy;
@@ -3212,9 +3213,10 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvt_n_f32_v, E);
case AArch64::BI__builtin_neon_vcvtq_n_f32_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvtq_n_f32_v, E);
+ case AArch64::BI__builtin_neon_vcvt_n_f64_v:
case AArch64::BI__builtin_neon_vcvtq_n_f64_v: {
llvm::Type *FloatTy =
- GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, true));
+ GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad));
llvm::Type *Tys[2] = { FloatTy, Ty };
Int = usgn ? Intrinsic::arm_neon_vcvtfxu2fp
: Intrinsic::arm_neon_vcvtfxs2fp;
@@ -3229,10 +3231,12 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvt_n_u32_v, E);
case AArch64::BI__builtin_neon_vcvtq_n_u32_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvtq_n_u32_v, E);
+ case AArch64::BI__builtin_neon_vcvt_n_s64_v:
+ case AArch64::BI__builtin_neon_vcvt_n_u64_v:
case AArch64::BI__builtin_neon_vcvtq_n_s64_v:
case AArch64::BI__builtin_neon_vcvtq_n_u64_v: {
llvm::Type *FloatTy =
- GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, true));
+ GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad));
llvm::Type *Tys[2] = { Ty, FloatTy };
Int = usgn ? Intrinsic::arm_neon_vcvtfp2fxu
: Intrinsic::arm_neon_vcvtfp2fxs;
@@ -3477,7 +3481,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Quad = true;
Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy);
llvm::Type *VTy = GetNeonType(this,
- NeonTypeFlags(NeonTypeFlags::Float64, false, Quad ? true : false));
+ NeonTypeFlags(NeonTypeFlags::Float64, false, Quad));
Ops[1] = Builder.CreateBitCast(Ops[1], VTy);
Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract");
Value *Result = Builder.CreateFMul(Ops[0], Ops[1]);
@@ -3671,15 +3675,16 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtxn;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtx_f32_f64");
}
- case AArch64::BI__builtin_neon_vcvt_f64_v: {
+ case AArch64::BI__builtin_neon_vcvt_f64_f32: {
llvm::Type *OpTy =
GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, false));
Ops[0] = Builder.CreateBitCast(Ops[0], OpTy);
return Builder.CreateFPExt(Ops[0], Ty, "vcvt");
}
+ case AArch64::BI__builtin_neon_vcvt_f64_v:
case AArch64::BI__builtin_neon_vcvtq_f64_v: {
Ops[0] = Builder.CreateBitCast(Ops[0], Ty);
- Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, true));
+ Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad));
return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt")
: Builder.CreateSIToFP(Ops[0], Ty, "vcvt");
}
@@ -3723,10 +3728,12 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
case AArch64::BI__builtin_neon_vcvtq_s32_v:
case AArch64::BI__builtin_neon_vcvtq_u32_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvtq_u32_v, E);
+ case AArch64::BI__builtin_neon_vcvt_s64_v:
+ case AArch64::BI__builtin_neon_vcvt_u64_v:
case AArch64::BI__builtin_neon_vcvtq_s64_v:
case AArch64::BI__builtin_neon_vcvtq_u64_v: {
llvm::Type *DoubleTy =
- GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, true));
+ GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad));
Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy);
return usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt")
: Builder.CreateFPToSI(Ops[0], Ty, "vcvt");
@@ -3738,6 +3745,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtns;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtns_f32");
}
+ case AArch64::BI__builtin_neon_vcvtn_s64_v:
case AArch64::BI__builtin_neon_vcvtnq_s64_v: {
llvm::Type *OpTy = llvm::VectorType::get(DoubleTy, VTy->getNumElements());
llvm::Type *Tys[2] = { Ty, OpTy };
@@ -3751,6 +3759,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtnu;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtnu_f32");
}
+ case AArch64::BI__builtin_neon_vcvtn_u64_v:
case AArch64::BI__builtin_neon_vcvtnq_u64_v: {
llvm::Type *OpTy = llvm::VectorType::get(DoubleTy, VTy->getNumElements());
llvm::Type *Tys[2] = { Ty, OpTy };
@@ -3764,6 +3773,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtps;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtps_f32");
}
+ case AArch64::BI__builtin_neon_vcvtp_s64_v:
case AArch64::BI__builtin_neon_vcvtpq_s64_v: {
llvm::Type *OpTy = llvm::VectorType::get(DoubleTy, VTy->getNumElements());
llvm::Type *Tys[2] = { Ty, OpTy };
@@ -3777,6 +3787,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtpu;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtpu_f32");
}
+ case AArch64::BI__builtin_neon_vcvtp_u64_v:
case AArch64::BI__builtin_neon_vcvtpq_u64_v: {
llvm::Type *OpTy = llvm::VectorType::get(DoubleTy, VTy->getNumElements());
llvm::Type *Tys[2] = { Ty, OpTy };
@@ -3790,6 +3801,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtms;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtms_f32");
}
+ case AArch64::BI__builtin_neon_vcvtm_s64_v:
case AArch64::BI__builtin_neon_vcvtmq_s64_v: {
llvm::Type *OpTy = llvm::VectorType::get(DoubleTy, VTy->getNumElements());
llvm::Type *Tys[2] = { Ty, OpTy };
@@ -3803,6 +3815,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtmu;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtmu_f32");
}
+ case AArch64::BI__builtin_neon_vcvtm_u64_v:
case AArch64::BI__builtin_neon_vcvtmq_u64_v: {
llvm::Type *OpTy = llvm::VectorType::get(DoubleTy, VTy->getNumElements());
llvm::Type *Tys[2] = { Ty, OpTy };
@@ -3816,6 +3829,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtas;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtas_f32");
}
+ case AArch64::BI__builtin_neon_vcvta_s64_v:
case AArch64::BI__builtin_neon_vcvtaq_s64_v: {
llvm::Type *OpTy = llvm::VectorType::get(DoubleTy, VTy->getNumElements());
llvm::Type *Tys[2] = { Ty, OpTy };
@@ -3829,6 +3843,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_fcvtau;
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtau_f32");
}
+ case AArch64::BI__builtin_neon_vcvta_u64_v:
case AArch64::BI__builtin_neon_vcvtaq_u64_v: {
llvm::Type *OpTy = llvm::VectorType::get(DoubleTy, VTy->getNumElements());
llvm::Type *Tys[2] = { Ty, OpTy };
@@ -3843,7 +3858,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrsqrte_v, E);
case AArch64::BI__builtin_neon_vsqrt_v:
case AArch64::BI__builtin_neon_vsqrtq_v: {
- Int = Intrinsic::aarch64_neon_fsqrt;
+ Int = Intrinsic::sqrt;
return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt");
}
case AArch64::BI__builtin_neon_vcvt_f32_v:
diff --git a/test/CodeGen/aarch64-neon-intrinsics.c b/test/CodeGen/aarch64-neon-intrinsics.c
index d23800a8f36547d78de0772069082275e67d8b8a..8c4ef4cf66f86e68ccf2e8b7069cbf6537d591c8 100644
--- a/test/CodeGen/aarch64-neon-intrinsics.c
+++ b/test/CodeGen/aarch64-neon-intrinsics.c
@@ -11441,3 +11441,171 @@ float64x1_t test_vneg_f64(float64x1_t a) {
return vneg_f64(a);
// CHECK: fneg d{{[0-9]+}}, d{{[0-9]+}}
}
+
+int64x1_t test_vcvt_s64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvt_s64_f64
+ return vcvt_s64_f64(a);
+ // CHECK: fcvtzs d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+uint64x1_t test_vcvt_u64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvt_u64_f64
+ return vcvt_u64_f64(a);
+ // CHECK: fcvtzu d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vcvtn_s64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvtn_s64_f64
+ return vcvtn_s64_f64(a);
+ // CHECK: fcvtns d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+uint64x1_t test_vcvtn_u64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvtn_u64_f64
+ return vcvtn_u64_f64(a);
+ // CHECK: fcvtnu d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vcvtp_s64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvtp_s64_f64
+ return vcvtp_s64_f64(a);
+ // CHECK: fcvtps d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+uint64x1_t test_vcvtp_u64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvtp_u64_f64
+ return vcvtp_u64_f64(a);
+ // CHECK: fcvtpu d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vcvtm_s64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvtm_s64_f64
+ return vcvtm_s64_f64(a);
+ // CHECK: fcvtms d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+uint64x1_t test_vcvtm_u64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvtm_u64_f64
+ return vcvtm_u64_f64(a);
+ // CHECK: fcvtmu d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vcvta_s64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvta_s64_f64
+ return vcvta_s64_f64(a);
+ // CHECK: fcvtas d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+uint64x1_t test_vcvta_u64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvta_u64_f64
+ return vcvta_u64_f64(a);
+ // CHECK: fcvtau d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vcvt_f64_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vcvt_f64_s64
+ return vcvt_f64_s64(a);
+ // CHECK: scvtf d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vcvt_f64_u64(uint64x1_t a) {
+ // CHECK-LABEL: test_vcvt_f64_u64
+ return vcvt_f64_u64(a);
+ // CHECK: ucvtf d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vcvt_n_s64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvt_n_s64_f64
+ return vcvt_n_s64_f64(a, 64);
+ // CHECK: fcvtzs d{{[0-9]+}}, d{{[0-9]+}}, #64
+}
+
+uint64x1_t test_vcvt_n_u64_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vcvt_n_u64_f64
+ return vcvt_n_u64_f64(a, 64);
+ // CHECK: fcvtzu d{{[0-9]+}}, d{{[0-9]+}}, #64
+}
+
+float64x1_t test_vcvt_n_f64_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vcvt_n_f64_s64
+ return vcvt_n_f64_s64(a, 64);
+ // CHECK: scvtf d{{[0-9]+}}, d{{[0-9]+}}, #64
+}
+
+float64x1_t test_vcvt_n_f64_u64(uint64x1_t a) {
+ // CHECK-LABEL: test_vcvt_n_f64_u64
+ return vcvt_n_f64_u64(a, 64);
+ // CHECK: ucvtf d{{[0-9]+}}, d{{[0-9]+}}, #64
+}
+
+float64x1_t test_vrndn_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrndn_f64
+ return vrndn_f64(a);
+ // CHECK: frintn d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrnda_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrnda_f64
+ return vrnda_f64(a);
+ // CHECK: frinta d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrndp_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrndp_f64
+ return vrndp_f64(a);
+ // CHECK: frintp d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrndm_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrndm_f64
+ return vrndm_f64(a);
+ // CHECK: frintm d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrndx_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrndx_f64
+ return vrndx_f64(a);
+ // CHECK: frintx d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrnd_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrnd_f64
+ return vrnd_f64(a);
+ // CHECK: frintz d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrndi_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrndi_f64
+ return vrndi_f64(a);
+ // CHECK: frinti d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrsqrte_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrsqrte_f64
+ return vrsqrte_f64(a);
+ // CHECK: frsqrte d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrecpe_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vrecpe_f64
+ return vrecpe_f64(a);
+ // CHECK: frecpe d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vsqrt_f64(float64x1_t a) {
+ // CHECK-LABEL: test_vsqrt_f64
+ return vsqrt_f64(a);
+ // CHECK: fsqrt d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrecps_f64(float64x1_t a, float64x1_t b) {
+ // CHECK-LABEL: test_vrecps_f64
+ return vrecps_f64(a, b);
+ // CHECK: frecps d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+float64x1_t test_vrsqrts_f64(float64x1_t a, float64x1_t b) {
+ // CHECK-LABEL: test_vrsqrts_f64
+ return vrsqrts_f64(a, b);
+ // CHECK: frsqrts d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
+}
diff --git a/utils/TableGen/NeonEmitter.cpp b/utils/TableGen/NeonEmitter.cpp
index 59c964b89051be4f5ceea94595cc300bbb6ba6ab..c92daf6297b6d9962bca3137a4a410e37e369e85 100644
--- a/utils/TableGen/NeonEmitter.cpp
+++ b/utils/TableGen/NeonEmitter.cpp
@@ -930,7 +930,8 @@ static bool endsWith_xN(std::string const &name) {
/// Insert proper 'b' 'h' 's' 'd' if prefix 'S' is used.
static std::string MangleName(const std::string &name, StringRef typestr,
ClassKind ck) {
- if (name == "vcvt_f32_f16" || name == "vcvt_f32_f64")
+ if (name == "vcvt_f32_f16" || name == "vcvt_f32_f64" ||
+ name == "vcvt_f64_f32")
return name;
bool quad = false;