From e9c6482b0021a1895a1b0acbb59221091d872a3c Mon Sep 17 00:00:00 2001
From: Michael Zuckerman <Michael.zuckerman@intel.com>
Date: Tue, 3 May 2016 12:45:04 +0000
Subject: [PATCH] [Clang][AVX512][Builtin] Adding intrinsics for
vcvt{ph|ps}2{ps|ph} instruction set
Differential Revision: http://reviews.llvm.org/D19767
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@268376 91177308-0d34-0410-b5e6-96231b3b80d8
---
include/clang/Basic/BuiltinsX86.def | 4 ++
lib/Headers/avx512vlintrin.h | 59 +++++++++++++++++++++++++++++
test/CodeGen/avx512vl-builtins.c | 48 +++++++++++++++++++++++
3 files changed, 111 insertions(+)
diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def
index c8a0b44c8f6..87c578efe6f 100644
--- a/include/clang/Basic/BuiltinsX86.def
+++ b/include/clang/Basic/BuiltinsX86.def
@@ -2252,6 +2252,10 @@ TARGET_BUILTIN(__builtin_ia32_compressstoredf512_mask, "vV8d*V8dUc","","avx512f"
TARGET_BUILTIN(__builtin_ia32_compressstoredi512_mask, "vV8LLi*V8LLiUc","","avx512f")
TARGET_BUILTIN(__builtin_ia32_compressstoresf512_mask, "vV16f*V16fUs","","avx512f")
TARGET_BUILTIN(__builtin_ia32_compressstoresi512_mask, "vV16i*V16iUs","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_vcvtph2ps_mask, "V4fV8sV4fUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_vcvtph2ps256_mask, "V8fV8sV8fUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_vcvtps2ph_mask, "V8sV4fIiV8sUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_vcvtps2ph256_mask, "V8sV8fIiV8sUc","","avx512vl")
#undef BUILTIN
#undef TARGET_BUILTIN
diff --git a/lib/Headers/avx512vlintrin.h b/lib/Headers/avx512vlintrin.h
index 37a4fa11a2f..dc6e0ba8285 100644
--- a/lib/Headers/avx512vlintrin.h
+++ b/lib/Headers/avx512vlintrin.h
@@ -9453,6 +9453,65 @@ _mm256_maskz_mov_ps (__mmask8 __U, __m256 __A)
(__mmask8) __U);
}
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_cvtph_ps (__m128 __W, __mmask8 __U, __m128i __A)
+{
+ return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A,
+ (__v4sf) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_cvtph_ps (__mmask8 __U, __m128i __A)
+{
+ return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A,
+ (__v4sf)
+ _mm_setzero_ps (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_mask_cvtph_ps (__m256 __W, __mmask8 __U, __m128i __A)
+{
+ return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A,
+ (__v8sf) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_maskz_cvtph_ps (__mmask8 __U, __m128i __A)
+{
+ return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A,
+ (__v8sf)
+ _mm256_setzero_ps (),
+ (__mmask8) __U);
+}
+
+#define _mm_mask_cvtps_ph( __W, __U, __A, __I) __extension__ ({ \
+__builtin_ia32_vcvtps2ph_mask ((__v4sf)( __A),( __I),\
+ (__v8hi)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm_maskz_cvtps_ph( __U, __A, __I) __extension__ ({ \
+__builtin_ia32_vcvtps2ph_mask ((__v4sf)( __A),( __I),\
+ (__v8hi)\
+ _mm_setzero_si128 (),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_mask_cvtps_ph( __W, __U, __A, __I) __extension__ ({ \
+__builtin_ia32_vcvtps2ph256_mask ((__v8sf)( __A),( __I),\
+ (__v8hi)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_maskz_cvtps_ph( __U, __A, __I) __extension__ ({ \
+__builtin_ia32_vcvtps2ph256_mask ((__v8sf)( __A),( __I),\
+ (__v8hi)\
+ _mm_setzero_si128 (),\
+ (__mmask8)( __U));\
+})
#undef __DEFAULT_FN_ATTRS
#undef __DEFAULT_FN_ATTRS_BOTH
diff --git a/test/CodeGen/avx512vl-builtins.c b/test/CodeGen/avx512vl-builtins.c
index 72e9ba2de66..a1b4c909948 100644
--- a/test/CodeGen/avx512vl-builtins.c
+++ b/test/CodeGen/avx512vl-builtins.c
@@ -6654,3 +6654,51 @@ __m256 test_mm256_maskz_mov_ps(__mmask8 __U, __m256 __A) {
return _mm256_maskz_mov_ps(__U, __A);
}
+__m128 test_mm_mask_cvtph_ps(__m128 __W, __mmask8 __U, __m128i __A) {
+ // CHECK-LABEL: @test_mm_mask_cvtph_ps
+ // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.128
+ return _mm_mask_cvtph_ps(__W, __U, __A);
+}
+
+__m128 test_mm_maskz_cvtph_ps(__mmask8 __U, __m128i __A) {
+ // CHECK-LABEL: @test_mm_maskz_cvtph_ps
+ // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.128
+ return _mm_maskz_cvtph_ps(__U, __A);
+}
+
+__m256 test_mm256_mask_cvtph_ps(__m256 __W, __mmask8 __U, __m128i __A) {
+ // CHECK-LABEL: @test_mm256_mask_cvtph_ps
+ // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.256
+ return _mm256_mask_cvtph_ps(__W, __U, __A);
+}
+
+__m256 test_mm256_maskz_cvtph_ps(__mmask8 __U, __m128i __A) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtph_ps
+ // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.256
+ return _mm256_maskz_cvtph_ps(__U, __A);
+}
+
+__m128i test_mm_mask_cvtps_ph(__m128i __W, __mmask8 __U, __m128 __A) {
+ // CHECK-LABEL: @test_mm_mask_cvtps_ph
+ // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.128
+ return _mm_mask_cvtps_ph(__W, __U, __A, _MM_FROUND_CUR_DIRECTION);
+}
+
+__m128i test_mm_maskz_cvtps_ph(__mmask8 __U, __m128 __A) {
+ // CHECK-LABEL: @test_mm_maskz_cvtps_ph
+ // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.128
+ return _mm_maskz_cvtps_ph(__U, __A, _MM_FROUND_CUR_DIRECTION);
+}
+
+__m128i test_mm256_mask_cvtps_ph(__m128i __W, __mmask8 __U, __m256 __A) {
+ // CHECK-LABEL: @test_mm256_mask_cvtps_ph
+ // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.256
+ return _mm256_mask_cvtps_ph(__W, __U, __A, _MM_FROUND_CUR_DIRECTION);
+}
+
+__m128i test_mm256_maskz_cvtps_ph(__mmask8 __U, __m256 __A) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtps_ph
+ // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.256
+ return _mm256_maskz_cvtps_ph(__U, __A, _MM_FROUND_CUR_DIRECTION);
+}
+
--
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