diff --git a/docs/UsersManual.rst b/docs/UsersManual.rst
index 15ae86a5641744b1178466ddc93cd43f1927d4df..4ca8435c368ccb11d51392840b2410b04ea57fef 100644
--- a/docs/UsersManual.rst
+++ b/docs/UsersManual.rst
@@ -1061,7 +1061,7 @@ are listed below.
 
    CRC instructions are enabled by default on ARMv8.
 
-.. option:: -mgeneral_regs_only
+.. option:: -mgeneral-regs-only
 
    Generate code which only uses the general purpose registers.
 
diff --git a/include/clang/Driver/Options.td b/include/clang/Driver/Options.td
index b40a9f7d39c5bba7818548fdb35decd799802cb8..25a1d12848a14375967215649b79cadc07ebf8c2 100644
--- a/include/clang/Driver/Options.td
+++ b/include/clang/Driver/Options.td
@@ -1054,7 +1054,7 @@ def mcrc : Flag<["-"], "mcrc">, Group<m_arm_Features_Group>,
 def mnocrc : Flag<["-"], "mnocrc">, Group<m_arm_Features_Group>,
   HelpText<"Disallow use of CRC instructions (ARM only)">;
 
-def mgeneral_regs_only : Flag<["-"], "mgeneral_regs_only">, Group<m_aarch64_Features_Group>,
+def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group<m_aarch64_Features_Group>,
   HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">;
 
 def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>;
diff --git a/test/Driver/aarch64-mgeneral_regs_only.c b/test/Driver/aarch64-mgeneral_regs_only.c
index 026f98c33193b07f22b603f625dceb281676ec02..28cdd08d531cea3dbe3115ccc087208a8796e85c 100644
--- a/test/Driver/aarch64-mgeneral_regs_only.c
+++ b/test/Driver/aarch64-mgeneral_regs_only.c
@@ -1,6 +1,6 @@
-// Test the -mgeneral_regs_only option
+// Test the -mgeneral-regs-only option
 
-// RUN: %clang -target aarch64-linux-eabi -mgeneral_regs_only %s -### 2>&1 \
+// RUN: %clang -target aarch64-linux-eabi -mgeneral-regs-only %s -### 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-NO-FP %s
 // CHECK-NO-FP: "-target-feature" "-fp-armv8"
 // CHECK-NO-FP: "-target-feature" "-crypto"