From fae3a1a40802cd4cc5b8d806e31da78ef3d83d13 Mon Sep 17 00:00:00 2001
From: Chad Rosier <mcrosier@codeaurora.org>
Date: Mon, 21 Oct 2013 20:12:01 +0000
Subject: [PATCH] [AArch64] Add the constraint to NEON scalar mla/mls
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@193118 91177308-0d34-0410-b5e6-96231b3b80d8
---
include/clang/Basic/arm_neon.td | 4 ++--
test/CodeGen/aarch64-neon-intrinsics.c | 16 ++++++++--------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/include/clang/Basic/arm_neon.td b/include/clang/Basic/arm_neon.td
index a748f11a78b..f370bd7de1f 100644
--- a/include/clang/Basic/arm_neon.td
+++ b/include/clang/Basic/arm_neon.td
@@ -882,11 +882,11 @@ def SCALAR_USQADD : SInst<"vsqadd", "sss", "SUcSUsSUiSUl">;
////////////////////////////////////////////////////////////////////////////////
// Signed Saturating Doubling Multiply-Add Long
-def SCALAR_SQDMLAL : SInst<"vqdmlal", "rss", "SsSi">;
+def SCALAR_SQDMLAL : SInst<"vqdmlal", "rrss", "SsSi">;
////////////////////////////////////////////////////////////////////////////////
// Signed Saturating Doubling Multiply-Subtract Long
-def SCALAR_SQDMLSL : SInst<"vqdmlsl", "rss", "SsSi">;
+def SCALAR_SQDMLSL : SInst<"vqdmlsl", "rrss", "SsSi">;
////////////////////////////////////////////////////////////////////////////////
// Signed Saturating Doubling Multiply Long
diff --git a/test/CodeGen/aarch64-neon-intrinsics.c b/test/CodeGen/aarch64-neon-intrinsics.c
index 1e630ce59a1..1696b49d9b1 100644
--- a/test/CodeGen/aarch64-neon-intrinsics.c
+++ b/test/CodeGen/aarch64-neon-intrinsics.c
@@ -7226,28 +7226,28 @@ uint64_t test_vsqaddd_u64(uint64_t a, uint64_t b) {
return (uint64_t)vsqaddd_u64(a, b);
}
-int32_t test_vqdmlalh_s16(int16_t a, int16_t b) {
+int32_t test_vqdmlalh_s16(int32_t a, int16_t b, int16_t c) {
// CHECK: test_vqdmlalh_s16
// CHECK: sqdmlal {{s[0-9]+}}, {{h[0-9]+}}, {{h[0-9]+}}
- return (int32_t)vqdmlalh_s16(a, b);
+ return (int32_t)vqdmlalh_s16(a, b, c);
}
-int64_t test_vqdmlals_s32(int32_t a, int32_t b) {
+int64_t test_vqdmlals_s32(int64_t a, int32_t b, int32_t c) {
// CHECK: test_vqdmlals_s32
// CHECK: sqdmlal {{d[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
- return (int64_t)vqdmlals_s32(a, b);
+ return (int64_t)vqdmlals_s32(a, b, c);
}
-int32_t test_vqdmlslh_s16(int16_t a, int16_t b) {
+int32_t test_vqdmlslh_s16(int32_t a, int16_t b, int16_t c) {
// CHECK: test_vqdmlslh_s16
// CHECK: sqdmlsl {{s[0-9]+}}, {{h[0-9]+}}, {{h[0-9]+}}
- return (int32_t)vqdmlslh_s16(a, b);
+ return (int32_t)vqdmlslh_s16(a, b, c);
}
-int64_t test_vqdmlsls_s32(int32_t a, int32_t b) {
+int64_t test_vqdmlsls_s32(int64_t a, int32_t b, int32_t c) {
// CHECK: test_vqdmlsls_s32
// CHECK: sqdmlsl {{d[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
- return (int64_t)vqdmlsls_s32(a, b);
+ return (int64_t)vqdmlsls_s32(a, b, c);
}
int32_t test_vqdmullh_s16(int16_t a, int16_t b) {
--
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