[x86] Clean up the x86 builtin specs to reflect r217310 in LLVM which

made the 8-bit masks actually 8-bit arguments to these intrinsics.

These builtins are a mess. Many were missing the I qualifier which
I added where obviously correct. Most aren't tested, but I've updated
the relevant tests. I've tried to catch all the things that should
become 'c' in this round.

It's also frustrating because the set of these is really ad-hoc and
doesn't really map that cleanly to the set supported by either GCC or
LLVM. Oh well...

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@217311 91177308-0d34-0410-b5e6-96231b3b80d8

include/clang/Basic/BuiltinsX86.def

@@ -303,12 +303,12 @@ BUILTIN(__builtin_ia32_monitor, "vv*UiUi", "")
 BUILTIN(__builtin_ia32_mwait, "vUiUi", "")
 BUILTIN(__builtin_ia32_lddqu, "V16ccC*", "")
 BUILTIN(__builtin_ia32_palignr128, "V16cV16cV16cIc", "")
-BUILTIN(__builtin_ia32_insertps128, "V4fV4fV4fi", "")
+BUILTIN(__builtin_ia32_insertps128, "V4fV4fV4fIc", "")
 
 BUILTIN(__builtin_ia32_pblendvb128, "V16cV16cV16cV16c", "")
-BUILTIN(__builtin_ia32_pblendw128, "V8sV8sV8sIi", "")
-BUILTIN(__builtin_ia32_blendpd, "V2dV2dV2dIi", "")
-BUILTIN(__builtin_ia32_blendps, "V4fV4fV4fIi", "")
+BUILTIN(__builtin_ia32_pblendw128, "V8sV8sV8sIc", "")
+BUILTIN(__builtin_ia32_blendpd, "V2dV2dV2dIc", "")
+BUILTIN(__builtin_ia32_blendps, "V4fV4fV4fIc", "")
 BUILTIN(__builtin_ia32_blendvpd, "V2dV2dV2dV2d", "")
 BUILTIN(__builtin_ia32_blendvps, "V4fV4fV4fV4f", "")
 
@@ -339,13 +339,13 @@ BUILTIN(__builtin_ia32_roundps, "V4fV4fi", "")
 BUILTIN(__builtin_ia32_roundss, "V4fV4fV4fi", "")
 BUILTIN(__builtin_ia32_roundsd, "V2dV2dV2di", "")
 BUILTIN(__builtin_ia32_roundpd, "V2dV2di", "")
-BUILTIN(__builtin_ia32_dpps, "V4fV4fV4fi", "")
-BUILTIN(__builtin_ia32_dppd, "V2dV2dV2di", "")
+BUILTIN(__builtin_ia32_dpps, "V4fV4fV4fIc", "")
+BUILTIN(__builtin_ia32_dppd, "V2dV2dV2dIc", "")
 BUILTIN(__builtin_ia32_movntdqa, "V2LLiV2LLi*", "")
 BUILTIN(__builtin_ia32_ptestz128, "iV2LLiV2LLi", "")
 BUILTIN(__builtin_ia32_ptestc128, "iV2LLiV2LLi", "")
 BUILTIN(__builtin_ia32_ptestnzc128, "iV2LLiV2LLi", "")
-BUILTIN(__builtin_ia32_mpsadbw128, "V16cV16cV16ci", "")
+BUILTIN(__builtin_ia32_mpsadbw128, "V16cV16cV16cIc", "")
 BUILTIN(__builtin_ia32_phminposuw128, "V8sV8s", "")
 
 // SSE 4.2
@@ -404,11 +404,11 @@ BUILTIN(__builtin_ia32_vpermilvarpd, "V2dV2dV2LLi", "")
 BUILTIN(__builtin_ia32_vpermilvarps, "V4fV4fV4i", "")
 BUILTIN(__builtin_ia32_vpermilvarpd256, "V4dV4dV4LLi", "")
 BUILTIN(__builtin_ia32_vpermilvarps256, "V8fV8fV8i", "")
-BUILTIN(__builtin_ia32_blendpd256, "V4dV4dV4dIi", "")
-BUILTIN(__builtin_ia32_blendps256, "V8fV8fV8fIi", "")
+BUILTIN(__builtin_ia32_blendpd256, "V4dV4dV4dIc", "")
+BUILTIN(__builtin_ia32_blendps256, "V8fV8fV8fIc", "")
 BUILTIN(__builtin_ia32_blendvpd256, "V4dV4dV4dV4d", "")
 BUILTIN(__builtin_ia32_blendvps256, "V8fV8fV8fV8f", "")
-BUILTIN(__builtin_ia32_dpps256, "V8fV8fV8fIi", "")
+BUILTIN(__builtin_ia32_dpps256, "V8fV8fV8fIc", "")
 BUILTIN(__builtin_ia32_cmppd256, "V4dV4dV4dc", "")
 BUILTIN(__builtin_ia32_cmpps256, "V8fV8fV8fc", "")
 BUILTIN(__builtin_ia32_vextractf128_pd256, "V2dV4dIc", "")
@@ -472,7 +472,7 @@ BUILTIN(__builtin_ia32_maskstorepd256, "vV4d*V4dV4d", "")
 BUILTIN(__builtin_ia32_maskstoreps256, "vV8f*V8fV8f", "")
 
 // AVX2
-BUILTIN(__builtin_ia32_mpsadbw256, "V32cV32cV32ci", "")
+BUILTIN(__builtin_ia32_mpsadbw256, "V32cV32cV32cIc", "")
 BUILTIN(__builtin_ia32_pabsb256, "V32cV32c", "")
 BUILTIN(__builtin_ia32_pabsw256, "V16sV16s", "")
 BUILTIN(__builtin_ia32_pabsd256, "V8iV8i", "")
@@ -492,7 +492,7 @@ BUILTIN(__builtin_ia32_palignr256, "V32cV32cV32cIc", "")
 BUILTIN(__builtin_ia32_pavgb256, "V32cV32cV32c", "")
 BUILTIN(__builtin_ia32_pavgw256, "V16sV16sV16s", "")
 BUILTIN(__builtin_ia32_pblendvb256, "V32cV32cV32cV32c", "")
-BUILTIN(__builtin_ia32_pblendw256, "V16sV16sV16sIi", "")
+BUILTIN(__builtin_ia32_pblendw256, "V16sV16sV16sIc", "")
 BUILTIN(__builtin_ia32_phaddw256, "V16sV16sV16s", "")
 BUILTIN(__builtin_ia32_phaddd256, "V8iV8iV8i", "")
 BUILTIN(__builtin_ia32_phaddsw256, "V16sV16sV16s", "")
@@ -559,8 +559,8 @@ BUILTIN(__builtin_ia32_vbroadcastss_ps, "V4fV4f", "")
 BUILTIN(__builtin_ia32_vbroadcastss_ps256, "V8fV4f", "")
 BUILTIN(__builtin_ia32_vbroadcastsd_pd256, "V4dV2d", "")
 BUILTIN(__builtin_ia32_vbroadcastsi256, "V4LLiV2LLi", "")
-BUILTIN(__builtin_ia32_pblendd128, "V4iV4iV4iIi", "")
-BUILTIN(__builtin_ia32_pblendd256, "V8iV8iV8iIi", "")
+BUILTIN(__builtin_ia32_pblendd128, "V4iV4iV4iIc", "")
+BUILTIN(__builtin_ia32_pblendd256, "V8iV8iV8iIc", "")
 BUILTIN(__builtin_ia32_pbroadcastb256, "V32cV16c", "")
 BUILTIN(__builtin_ia32_pbroadcastw256, "V16sV8s", "")
 BUILTIN(__builtin_ia32_pbroadcastd256, "V8iV4i", "")

test/CodeGen/avx2-builtins.c

@@ -6,7 +6,7 @@
 #include <immintrin.h>
 
 __m256i test_mm256_mpsadbw_epu8(__m256i x, __m256i y) {
-  // CHECK: @llvm.x86.avx2.mpsadbw({{.*}}, {{.*}}, i32 3)
+  // CHECK: @llvm.x86.avx2.mpsadbw({{.*}}, {{.*}}, i8 3)
   return _mm256_mpsadbw_epu8(x, y, 3);
 }
 

test/CodeGen/builtins-x86.c

@@ -386,7 +386,7 @@ void f0() {
   tmp_V4f = __builtin_ia32_roundss(tmp_V4f, tmp_V4f, imm_i_0_16);
   tmp_V2d = __builtin_ia32_roundsd(tmp_V2d, tmp_V2d, imm_i_0_16);
   tmp_V2d = __builtin_ia32_roundpd(tmp_V2d, imm_i_0_16);
-  tmp_V4f = __builtin_ia32_insertps128(tmp_V4f, tmp_V4f, tmp_i);
+  tmp_V4f = __builtin_ia32_insertps128(tmp_V4f, tmp_V4f, imm_i_0_256);
 #endif
 
   tmp_V4d = __builtin_ia32_addsubpd256(tmp_V4d, tmp_V4d);