Skip to content
Snippets Groups Projects
Commit e1a39ac4 authored by Tim Northover's avatar Tim Northover
Browse files

ARM64: update tests now that we print "mov" & "mvn". 

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@208875 91177308-0d34-0410-b5e6-96231b3b80d8
parent a9915c01
No related branches found
No related tags found
No related merge requests found
Hide whitespace changes
Inline Side-by-side
test/CodeGen/aarch64-neon-misc.c
+ 14
− 14
View file @ e1a39ac4
......@@ -1206,85 +1206,85 @@ poly8x16_t test_vcntq_p8(poly8x16_t a) {
int8x8_t test_vmvn_s8(int8x8_t a) {
// CHECK-LABEL: test_vmvn_s8
return vmvn_s8(a);
// CHECK: not v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
// CHECK: {{mvn|not}} v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
}
int8x16_t test_vmvnq_s8(int8x16_t a) {
// CHECK-LABEL: test_vmvnq_s8
return vmvnq_s8(a);
// CHECK: not v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
// CHECK: {{mvn|not}} v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
}
int16x4_t test_vmvn_s16(int16x4_t a) {
// CHECK-LABEL: test_vmvn_s16
return vmvn_s16(a);
// CHECK: not v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
// CHECK: {{mvn|not}} v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
}
int16x8_t test_vmvnq_s16(int16x8_t a) {
// CHECK-LABEL: test_vmvnq_s16
return vmvnq_s16(a);
// CHECK: not v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
// CHECK: {{mvn|not}} v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
}
int32x2_t test_vmvn_s32(int32x2_t a) {
// CHECK-LABEL: test_vmvn_s32
return vmvn_s32(a);
// CHECK: not v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
// CHECK: {{mvn|not}} v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
}
int32x4_t test_vmvnq_s32(int32x4_t a) {
// CHECK-LABEL: test_vmvnq_s32
return vmvnq_s32(a);
// CHECK: not v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
// CHECK: {{mvn|not}} v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
}
uint8x8_t test_vmvn_u8(uint8x8_t a) {
// CHECK-LABEL: test_vmvn_u8
return vmvn_u8(a);
// CHECK: not v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
// CHECK: {{mvn|not}} v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
}
uint8x16_t test_vmvnq_u8(uint8x16_t a) {
// CHECK-LABEL: test_vmvnq_u8
return vmvnq_u8(a);
// CHECK: not v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
// CHECK: {{mvn|not}} v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
}
uint16x4_t test_vmvn_u16(uint16x4_t a) {
// CHECK-LABEL: test_vmvn_u16
return vmvn_u16(a);
// CHECK: not v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
// CHECK: {{mvn|not}} v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
}
uint16x8_t test_vmvnq_u16(uint16x8_t a) {
// CHECK-LABEL: test_vmvnq_u16
return vmvnq_u16(a);
// CHECK: not v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
// CHECK: {{mvn|not}} v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
}
uint32x2_t test_vmvn_u32(uint32x2_t a) {
// CHECK-LABEL: test_vmvn_u32
return vmvn_u32(a);
// CHECK: not v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
// CHECK: {{mvn|not}} v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
}
uint32x4_t test_vmvnq_u32(uint32x4_t a) {
// CHECK-LABEL: test_vmvnq_u32
return vmvnq_u32(a);
// CHECK: not v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
// CHECK: {{mvn|not}} v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
}
poly8x8_t test_vmvn_p8(poly8x8_t a) {
// CHECK-LABEL: test_vmvn_p8
return vmvn_p8(a);
// CHECK: not v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
// CHECK: {{mvn|not}} v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
}
poly8x16_t test_vmvnq_p8(poly8x16_t a) {
// CHECK-LABEL: test_vmvnq_p8
return vmvnq_p8(a);
// CHECK: not v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
// CHECK: {{mvn|not}} v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
}
int8x8_t test_vrbit_s8(int8x8_t a) {
......
test/CodeGen/aarch64-neon-scalar-copy.c
+ 14
− 14
View file @ e1a39ac4
......@@ -57,7 +57,7 @@ int16_t test_vduph_lane_s16(int16x4_t a) {
// CHECK-LABEL: test_vdups_lane_s32
int32_t test_vdups_lane_s32(int32x2_t a) {
return vdups_lane_s32(a, 1);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.s[1]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.s[1]
}
......@@ -71,21 +71,21 @@ int64_t test_vdupd_lane_s64(int64x1_t a) {
// CHECK-LABEL: test_vdupb_lane_u8
uint8_t test_vdupb_lane_u8(uint8x8_t a) {
return vdupb_lane_u8(a, 7);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.b[7]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.b[7]
}
// CHECK-LABEL: test_vduph_lane_u16
uint16_t test_vduph_lane_u16(uint16x4_t a) {
return vduph_lane_u16(a, 3);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.h[3]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.h[3]
}
// CHECK-LABEL: test_vdups_lane_u32
uint32_t test_vdups_lane_u32(uint32x2_t a) {
return vdups_lane_u32(a, 1);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.s[1]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.s[1]
}
......@@ -112,65 +112,65 @@ int16_t test_vduph_laneq_s16(int16x8_t a) {
// CHECK-LABEL: test_vdups_laneq_s32
int32_t test_vdups_laneq_s32(int32x4_t a) {
return vdups_laneq_s32(a, 3);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.s[3]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.s[3]
}
// CHECK-LABEL: test_vdupd_laneq_s64
int64_t test_vdupd_laneq_s64(int64x2_t a) {
return vdupd_laneq_s64(a, 1);
// CHECK: umov {{x[0-9]+}}, {{v[0-9]+}}.d[1]
// CHECK: {{mov|umov}} {{x[0-9]+}}, {{v[0-9]+}}.d[1]
}
// CHECK-LABEL: test_vdupb_laneq_u8
uint8_t test_vdupb_laneq_u8(uint8x16_t a) {
return vdupb_laneq_u8(a, 15);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.b[15]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.b[15]
}
// CHECK-LABEL: test_vduph_laneq_u16
uint16_t test_vduph_laneq_u16(uint16x8_t a) {
return vduph_laneq_u16(a, 7);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.h[7]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.h[7]
}
// CHECK-LABEL: test_vdups_laneq_u32
uint32_t test_vdups_laneq_u32(uint32x4_t a) {
return vdups_laneq_u32(a, 3);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.s[3]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.s[3]
}
// CHECK-LABEL: test_vdupd_laneq_u64
uint64_t test_vdupd_laneq_u64(uint64x2_t a) {
return vdupd_laneq_u64(a, 1);
// CHECK: umov {{x[0-9]+}}, {{v[0-9]+}}.d[1]
// CHECK: {{mov|umov}} {{x[0-9]+}}, {{v[0-9]+}}.d[1]
}
// CHECK-LABEL: test_vdupb_lane_p8
poly8_t test_vdupb_lane_p8(poly8x8_t a) {
return vdupb_lane_p8(a, 7);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.b[7]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.b[7]
}
// CHECK-LABEL: test_vduph_lane_p16
poly16_t test_vduph_lane_p16(poly16x4_t a) {
return vduph_lane_p16(a, 3);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.h[3]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.h[3]
}
// CHECK-LABEL: test_vdupb_laneq_p8
poly8_t test_vdupb_laneq_p8(poly8x16_t a) {
return vdupb_laneq_p8(a, 15);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.b[15]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.b[15]
}
// CHECK-LABEL: test_vduph_laneq_p16
poly16_t test_vduph_laneq_p16(poly16x8_t a) {
return vduph_laneq_p16(a, 7);
// CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.h[7]
// CHECK: {{mov|umov}} {{w[0-9]+}}, {{v[0-9]+}}.h[7]
}
test/CodeGen/aarch64-poly64.c
+ 1
− 1
View file @ e1a39ac4
......@@ -56,7 +56,7 @@ poly64_t test_vget_lane_p64(poly64x1_t v) {
poly64_t test_vgetq_lane_p64(poly64x2_t v) {
// CHECK-LABEL: test_vgetq_lane_p64
return vgetq_lane_p64(v, 1);
// CHECK: umov {{x[0-9]+}}, {{v[0-9]+}}.d[1]
// CHECK: {{mov|umov}} {{x[0-9]+}}, {{v[0-9]+}}.d[1]
}
poly64x1_t test_vset_lane_p64(poly64_t a, poly64x1_t v) {
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment