tables for fully-implemented language modes by default. Also add some missing
elements to TS support table.


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not reflect the final chosen names, but supporting them now seems to have
little downside.


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function correctly when targeting MS ABIs (this appears to have never mattered
prior to this change).

Update test case to always cover both 32-bit and 64-bit Windows ABIs, since
they behave somewhat differently from each other here.

Update test case to also cover operators , && and ||, which it appears are also
affected by P0145R3 (they're not explicitly called out by the design document,
but this is the emergent behavior of the existing wording).


Original commit message:

P0145R3 (C++17 evaluation order tweaks): evaluate the right-hand side of
assignment and compound-assignment operators before the left-hand side. (Even
if it's an overloaded operator.)

This completes the implementation of P0145R3 + P0400R0 for all targets except
Windows, where the evaluation order guarantees for <<, >>, and ->* are
unimplementable as the ABI requires the function arguments are evaluated from
right to left (because parameter destructors are run from left to right in the
callee).


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Differential Revision: https://reviews.llvm.org/D24946

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These builtins are available on sm_60+ GPU only.

Differential Revision: https://reviews.llvm.org/D24944

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The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include
guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted
environment since it expects stdlib.h to be available - which is not the case
in these internal clang codegen tests).
This patch removes this hack and instead passes -ffreestanding to clang cc1.

Differential Revision: https://reviews.llvm.org/D24825



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This should fix r282572.


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Summary:
Now two replacements are considered order-independent if applying them in
either order produces the same result. These include (but not restricted
to) replacements that:
  - don't overlap (being directly adjacent is fine) and
  - are overlapping deletions.
  - are insertions at the same offset and applying them in either order
    has the same effect, i.e. X + Y = Y + X if one inserts text X and the
    other inserts text Y.

Discussion about this design can be found in D24717

Reviewers: djasper, klimek

Subscribers: omtcyfz, cfe-commits

Differential Revision: https://reviews.llvm.org/D24800

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[StaticAnalyzer] Fix false positives for vardecls that are technically unreachable but they are needed.

Example:

    switch (x) {
      int a;  // <- This is unreachable but needed
    case 1:
      a = ...

Differential Revision: https://reviews.llvm.org/D24905



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- Use defvar to declare variables
- Don't use delete-backward-char, which is for interactive use only

Patch by Philipp Stephani

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* Some code cleanup
* Add tests not present in http://reviews.llvm.org/D14286
* Integrate a test suite from Serge Pavlov (http://reviews.llvm.org/D14224)
* ArrayTypeTraitExpr: serialize sub-expression to avoid keeping it undefined
* Implement import of some nodes:
  - ArrayTypeTraitExpr
  - ExpressionTraitExpr
  - OpaqueValueExpr
  - ArraySubscriptExpr
  - ExplicitCastExpr
  - ImplicitValueInitExpr
  - OffsetOfExpr
  - CXXThisExpr
  - CXXThrowExpr
  - CXXNoexceptExpr
  - CXXDefaultArgExpr
  - CXXScalarValueInitExpr
  - CXXBindTemporaryExpr
  - CXXTemporaryObjectExpr
  - MaterializeTemporaryExpr
  - ExprWithCleanups

  - StaticAssertDecl
  - FriendDecl

  - DecayedType

Differential Revision: https://reviews.llvm.org/D14326



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This matches the rest of the surrounding file.

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The warning I added in r282426 should be a diagnostic group.

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assignment and compound-assignment operators before the left-hand side. (Even
if it's an overloaded operator.)

This completes the implementation of P0145R3 + P0400R0 for all targets except
Windows, where the evaluation order guarantees for <<, >>, and ->* are
unimplementable as the ABI requires the function arguments are evaluated from
right to left (because parameter destructors are run from left to right in the
callee).


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This patch fixes a regression introduced in r262697 that changed the way the
coverage regions for switches are constructed. The PGO instrumentation counter
for a switch statement refers to the counter at the exit of the switch.
Therefore, the coverage region for the switch statement should cover the code
that comes after the switch, and not the switch statement itself.

rdar://28480997

Differential Revision: https://reviews.llvm.org/D24981


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In some cases, non-special member functions were being marked as being defaulted
in templated classes.  This can cause interactions with later code that expects
the default function to be one of the specific member functions.  Fix the check
so that templated class members are checked the same way as non-templated class
members are.


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With the new streaming interface in LLVM, these class names need to be
typed a lot and it's way too looong.

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This reverts commit r282500.

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Differential Revision:https: //reviews.llvm.org/D24961


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Warning, treated as error:
/opt/llvm/build.attributes.src/tools/clang/docs/CommandGuide/clang.rst:413: WARNING: unknown option: -save-stats=cwd


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This patch corresponds to review:
https://reviews.llvm.org/D24397

It adds the __POWER9_VECTOR__ macro and the -mpower9-vector option along with
a number of altivec.h functions (refer to the code review for a list).


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Reviewers: aaron.ballman

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D24928

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the pointer-to-member expression in calls through .* and ->* expressions.


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subscripting before the RHS, regardless of which is the base and which is the
index.


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Fixes the following:
  BOOL (^aaa)(void) = ^BOOL {
  };

The first BOOL's token was getting set to TT_FunctionAnnotationRParen
incorrectly, which was causing an unexpected newline after (^aaa). This
was introduced in r245846.

Patch by Kent Sutherland, thank you!

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On ARM, there are multiple versions of each of the intrinsics, with
acquire/relaxed/release barrier semantics.

The newly added ones are provided as inline functions here instead of builtins,
since they should only be available on certain archs (arm/aarch64).

This is necessary in order to compile C++ code for ARM in MSVC mode.

Patch by Martin Storsjö!

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