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Add builtins for the functions and custom codegen mapping the builtins to their
corresponding intrinsics and handling the endian related swapping.

https://reviews.llvm.org/D26546

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deduction, don't forget to check the argument is valid.


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Simplify ASTReader ctor by using in-class initializers (NSDMIs to the rest of you) for many member variables

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The intrusiveness wasn't needed here, so this simplifies/clarifies the
ownership model.

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Simplifies and makes explicit the memory ownership model rather than
implicitly passing/acquiring ownership.

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It seems that the ARM buildbots do not include x86 support.  However,
other x86 targets do not support the ARM target.  Use a x86 triple and
require the registered target.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@291142 91177308-0d34-0410-b5e6-96231b3b80d8

Summary:
MSVC seems to use "__in" and "__out" for its own purposes, so we have to
pick different names in this macro.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28325

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Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28324

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Summary:
When compiling device code, we may still see host code with explicit
calling conventions.  NVPTX needs to claim that it supports these CCs,
so that (a) we don't raise noisy warnings, and (b) we don't break
existing code which relies on the existence of these CCs when
specializing templates.  (If a CC doesn't exist, clang ignores it, so
two template specializations which are different only insofar as one
specifies a CC are considered identical and therefore are an error if
that CC is not supported.)

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28323

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Summary:
CUDA lets users share structs between the host and device, so for that
and other reasons, primitive types such as ptrdiff_t should be the same
on both sides of the compilation.

Our code to do this wasn't entirely successful.  In particular, we did a
bunch of work during the NVPTXTargetInfo constructor, only to override
it in the NVPTX{32,64}TargetInfo constructors.  It worked well enough on
Linux and Mac, but Windows is LLP64, which is different enough to break
it.

This patch removes the NVPTX{32,64}TargetInfo classes entirely and fixes
the bug described above.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28322

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Summary: CUDA attributes are spelled __declspec(__foo__) on Windows.

Reviewers: tra

Subscribers: cfe-commits, rnk

Differential Revision: https://reviews.llvm.org/D28321

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Summary:
For the most part this is straightforward: Just add a CudaInstallation
object to the MSVC and MinGW toolchains.

CudaToolChain has to override computeMSVCVersion so that
Clang::constructJob passes the right version flag to cc1.  We have to
modify IsWindowsMSVC and friends in Clang::constructJob to be true when
compiling CUDA device code on Windows for the same reason.

Depends on: D28319

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28320

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Summary:
Previously it was taking the true target triple, which is not really
what it needs: The location of the CUDA installation depends on the host
OS.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28319

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Summary:
When Sema looks up an attribute name, it strips off leading and trailing
"__" if the attribute is GNU-style.  That is, __attribute__((foo)) and
__attribute__((__foo__)) are equivalent.

This is only true for GNU-style attributes.  In particular,
__declspec(__foo__) is not equivalent to __declspec(foo), and Sema
respects this difference.

This patch fixes TableGen to match Sema's behavior.  The spelling
'GNU<"__foo__">' should be normalized to 'GNU<"foo">', but
'Declspec<"__foo__">' should not be changed.

This is necessary to make CUDA compilation work on Windows, because e.g.
the __device__ attribute is spelled __declspec(__device__).

Attr.td does not contain any Declspec spellings that start or end with
"__", so this change should not affect any other attributes.

Reviewers: rnk

Subscribers: cfe-commits, tra

Differential Revision: https://reviews.llvm.org/D28318

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Summary:
These duplicate declarations cause a problem for CUDA compiles on
Windows.  All implicitly-defined functions are host+device, and this
applies to the declarations in Builtin.def.  But then when we see the
declarations in intrin.h, they have no attributes, so are host-only
functions.  This is an error.

(A better fix might be to make these builtins host-only, but that is a
much bigger change.)

Reviewers: rnk

Subscribers: cfe-commits, echristo

Differential Revision: https://reviews.llvm.org/D28317

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Not all targets use the integrated assembler.  Specify a triple to
ensure we use the integrated as for this.

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Summary:
This patch adds two fields to the offload entry descriptor. One field is meant to signal Ctors/Dtors and `link` global variables, and the other is reserved for runtime library use. 

 Currently, these fields are only filled with zeros in the current code generation, but that will change when `declare target` is added. 

The reason, we are adding these fields now is to make the code generation consistent with the runtime library proposal under review in https://reviews.llvm.org/D14031.

Reviewers: ABataev, hfinkel, carlo.bertolli, kkwli0, arpith-jacob, Hahnfeld

Subscribers: cfe-commits, caomhin, jholewinski

Differential Revision: https://reviews.llvm.org/D28298

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inline assembly may use the `.include` directive to include other
content into the file.  Without the integrated assembler, the `-I` group
gets passed to the assembler.  Emulate this by collecting the header
search paths and passing them to the IAS.

Resolves PR24811!

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This patch includes updates for codegen of the target region for the NVPTX
device. It moves initializers from the compiler to the runtime and updates
the worker loop to assume parallel work is retrieved from the runtime. A
subsequent patch will update the codegen to retrieve the parallel work using
calls to the runtime. It includes the removal of the inline attribute
for the worker loop and disabling debug info in it.

This allows codegen for a target directive and serial execution on the
NVPTX device.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D28125


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As Senthil points out, this is unnecessary as we already have these
registers in AddlRegNames.

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These are synonyms for the X,Y, and Z registers.

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Summary:
Authored by Senthil Kumar Selvaraj

This patch adds barebones support in Clang for the (experimental) AVR target. It uses the integrated assembler for assembly, and the GNU linker for linking, as lld doesn't know about the target yet.

The DataLayout string is the same as the one in AVRTargetMachine.cpp. The alignment specs look wrong to me, as it's an 8 bit target and all types only need 8 bit alignment. Clang failed with a datalayout mismatch error when I tried to change it, so I left it that way for now.

Reviewers: rsmith, dylanmckay, cfe-commits, rengolin

Subscribers: rengolin, jroelofs, wdng

Differential Revision: https://reviews.llvm.org/D27123

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No functionality change intended.


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We were previously incorrectly using TDK_TooFewArguments to report a template
argument list that's too short, but it actually means that the number of
arguments in a top-level function call was insufficient. When diagnosing the
problem, SemaOverload would (rightly) assert that the failure kind didn't make
any sense.


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Looks like these functions exist just to prevent bad implicit
conversions. Rather than waiting for the linker to complain about
undefined references to them, we can mark them as deleted.


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Summary:
Replace some old code that probably pre-dated the change to delay
emission of dllexported code until after the closing brace of the
outermost record type. Only uninstantiated default argument expressions
need to be handled now. It is enough to instantiate default argument
expressions when instantiating dllexported default ctors. This also
fixes some double-diagnostic issues in this area.

Fixes PR31500

Reviewers: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28274

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Front end component (back end changes are D27392).  The vectorcall 
calling convention was broken subtly in two cases.  First, 
it didn't properly handle homogeneous vector aggregates (HVAs). 
Second, the vectorcall specification requires that only the 
first 6 parameters be eligible for register assignment. 
This patch fixes both issues.

Differential Revision: https://reviews.llvm.org/D27529


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ODR use. These traits don't have a definition as they're intended to be
used strictly at compile time. Change the tests to use static_assert to
move the entire thing into compile-time.

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